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Interconnect Signals
Table 8-4. P1—CPM Expansion Connector (continued)
Pin No.
A14
Signal Name
ATMRXADR4(PD18)
Attribute
I/O, T.S
Description
ATM Multi-PHY Rx Address 4. When the ATM port Multi-PHY
function is enabled, this line is connected to the receive PHY
Address of the PM5384 ATM UNI. When this port is disabled, this
signal is tristated and may be used for any available function of
PD18.
A15
ATMRXPTY (PD17)
I/O, T.S.
ATM Receive Parity Line. When the ATM port is enabled, this line
is connected to the receive parity of the PM5384 ATM UNI. When
this port is disabled, this signal is tristated and may be used for any
available function of PD17.
A16
ATMTXPTY (PD16)
I/O, T.S.
ATM Transmit Parity Line. When the ATM port is enabled, this line
is connected to the transmit parity of the PM5384 ATM UNI. When
this port is disabled, this signal may be used for any available
function of PD16.
A17
I2CSDA(PD15)
I/O, T.S.
This signal is connected to the serial I 2 C data line. This line may
be used off-board as an I 2 C data line for external I 2 C device.
A18
I2CSCL(PD14)
I/O, T.S.
This signal is connected to the serial I 2 C clock line. This line may
be used off-board as an I 2 C clock line for external I 2 C device.
A19
A20
A21
A22
A23
A24
A25
ATMTXADR3(PD7)
I/O, T.S
ATM Multi-PHY Tx Address 3. When the ATM port Multi-PHY
function is enabled, this line is connected to the transmit PHY
Address of the PM5384 ATM UNI. When this port is disabled, this
signal is tristated and may be used for any available function of
PD7.
A26
A27
A28
A29
ATMRCLKDIS
I
ATM Receive Clock Out Disable. When active (H), the ATMRCLK
output, on pin C29 of this connector, is Tri-stated. When either not
connected or driven low, ATMRCLK on pin C29, is enabled. This
provides compatibility with ENG revision of T/ECOM
communication tools.
A30
A31
EXPVCC
O
5V Supply. Connected to ADS’s 5V VCC plane. Provided as power
supply for external tool.
A32
Chapter 8. Support
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